Johann Großschädl

From ESC2013
Revision as of 22:59, 17 January 2013 by Guest (talk | contribs) (Created page with "'''Topic''' '''Abstract''' The talk will be about a small 8-bit AVR-compatible Processor that we designed from scratch so that we can include some hardware support for speed...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

Topic

Abstract

The talk will be about a small 8-bit AVR-compatible Processor that we designed from scratch so that we can include some hardware support for speeding up ECC. We have achieved some interesting results: our processor is fully AVR (i.e. ATmega128) compatible, has a size of only 20k gates and is able to perform a 160-bit scalar multiplication in only 1 million cycles, all of which compares very well in relation to the ECC hardware for RFID that was mentioned in the talk by Jens Hermans. We have also some interesting results about power consumption and energy requirements of ECC.