Ko Stoffelen

From ESC2017
Jump to: navigation, search

Title: AES on the ARM Cortex-M3 and M4

Abstract: At SAC 2016, we published highly-optimized AES-{128,192,256}-CTR assembly implementations for the popular ARM Cortex-M3 and M4 embedded microprocessors that set new speed records. Additionally, we provided the fastest bitsliced constant-time and masked implementations of AES-128-CTR to protect against timing attacks, power analysis and other (first-order) side-channel attacks. All implementations, including an architecture-specific instruction scheduler and register allocator, which we use to minimize expensive loads, are released into the public domain.